A concurrent error detection based fault-tolerant 32 nm XOR-XNOR circuit implementation

As modern processors and semiconductor circuits move into 32 nm technologies and below, designers face the major problem of process variations. This problem makes designing VLSI circuits harder and harder, affects the circuit performance and introduces faults that can cause critical failures. Therefore, fault-tolerant design is required to obtain the necessary level of reliability and availability especially for safety-critical systems. Since XOR-XNOR circuits are basic building blocks in various digital and mixed systems, especially in arithmetic circuits, these gates should be designed such that they indicate any malfunction during normal operation. In fact, this property of verifying the results delivered by a circuit during its normal operation is called Concurrent Error Detection (CED). In this paper, we propose a CED based fault- tolerant XOR-XNOR circuit implementation. The proposed design is performed using the 32 nm process technology.published_or_final_versio

Design of a Reliable XOR-XNOR Circuit for Arithmetic Logic Units

Part 12: DATICSInternational audienceComputer systems used in safety-critical applications like space, avionic and biomedical applications require high reliable integrated circuits (ICs) to ensure the accuracy of data they process. As Arithmetic Logic Units (ALUs) are essential element of computers, designing reliable ALUs is becoming an appropriate strategy to design fault-tolerant computers. In fact, with the continuous increase of integration densities and complexities ICs are susceptible to many modes of failure. Thereby, Reliable operation of ALUs is critical for high performance safety-critical computers. Given that XOR-XNOR circuits are basic building blocks in ALUs, designing efficient reliable XOR-XNOR gates is an important challenge in the area of high performance computers. The reliability enhancement technique presented in this work is based on using a Concurrent Error Detection (CED) based reliable XOR-XNOR circuit implementation to detect permanent and transient faults in ALUs during normal operation in order to improve the reliability of highly critical computer systems. The proposed design is performed using the 32 nm process technology

A Self-test and self-repair approach for analog integrated circuits

With the continuous increase of integration densities and complexities, secure integrated circuits (ICs) are more and more required to guarantee reliability for safety-critical applications in the presence of soft and hard faults. Thus, testing has become a real challenge for enhancing the reliability of safety-critical systems. This paper presents a Self-Test and Self- Repair approach which can be used to tolerate the most likely defects of bridging type that create a resistive path between VDD supply voltage and the ground occurring in analog CMOS circuits during the manufacturing process. The proposed testing approach is designed using the 65 nm CMOS technology. We then used an operational amplifier (OPA) to validate the technique and correlate it with post layout simulation resultsTaikomosios informatikos katedraVytauto Didžiojo universiteta

Molecular Epidemiology of SARS-CoV-2 in Tunisia (North Africa) through Several Successive Waves of COVID-19

Documenting the circulation dynamics of SARS-CoV-2 variants in different regions of the world is crucial for monitoring virus transmission worldwide and contributing to global efforts towards combating the pandemic. Tunisia has experienced several waves of COVID-19 with a significant number of infections and deaths. The present study provides genetic information on the different lineages of SARS-CoV-2 that circulated in Tunisia over 17 months. Lineages were assigned for 1359 samples using whole-genome sequencing, partial S gene sequencing and variant-specific real-time RT-PCR tests. Forty-eight different lineages of SARS-CoV-2 were identified, including variants of concern (VOCs), variants of interest (VOIs) and variants under monitoring (VUMs), particularly Alpha, Beta, Delta, A.27, Zeta and Eta. The first wave, limited to imported and import-related cases, was characterized by a small number of positive samples and lineages. During the second wave, a large number of lineages were detected; the third wave was marked by the predominance of the Alpha VOC, and the fourth wave was characterized by the predominance of the Delta VOC. This study adds new genomic data to the global context of COVID-19, particularly from the North African region, and highlights the importance of the timely molecular characterization of circulating strains